1. Field of the Invention
The present invention relates to a digital-analog converter, and more particularly, to a digital-analog converter that reduces a current mismatch by laying-out the bias circuit of current cells adjacent to each other in a common current centroid manner or connecting the output lines of the current cells in a tournament manner.
2. Description of the Related Art
A digital-analog converter has been used for converting a digital signal into an analog signal corresponding thereto in various electronic circuits.
For example, a high-resolution and high-speed digital-analog converter has been applied in cellular base stations, wireless communications, direct digital frequency syntheses, signal reproductions, test equipment, high-resolution imaging systems, and optional waveform generators.
As the digital-analog converter, a digital-analog converter configured of a current cell matrix has been mainly used. In the digital-analog converter configured of the current cell matrix, the linearity of the output may be reduced due to a mismatch of a current source.
The mismatch of the current source may be generated due to a voltage drop generated along a power line, change in idle variation, thermal distribution in a chip, a current value mismatch according to current directions and the like. Therefore, a problem arises in that linearity is reduced due to a graded error, a symmetrical error, a random error and the like.